Question

What are the causes and improvement measures for PCB outer layer holes?

Answer 1

The causes and improvement measures for holes in the outer layer of PCB are as follows:

1. AOI missed detection. Confirm whether there is a gap in the inner measurement of the slice hole ring. For small hole ring gaps caused by such foreign matter, AOI will often adjust parameters in order to reduce the rate of false points, resulting in missed detection. 

2. External force. The current situation of the slicing is that the hole copper is vertically disconnected from the hole, and there is no residual copper in the hole. The main reasons are: handling movements, development transfer rollers, etching transfer rollers, reworking methods after development, and the abnormal plate detected during etching is not separated by film, etc.

3. Oxidation of the board surface. The current situation of the slices is that there is residual copper on the edge of the orifice, which is caused by poor dry film bonding and chemical attack. The main reasons are: abnormal pre-treatment liquid, abnormal plates not being unwashed, lamination personnel not wearing gloves, etc.

4. Foreign objects. The current situation of the slice is that the copper at the edge of the orifice has a sharp angle, or the hole ring is notched. The main reasons are: foreign matter exposure, foreign matter after lamination, and low exposure energy, which prevents ultraviolet rays from penetrating tiny foreign matter.

5. Glue flow. The current situation of the slice is the edge of the hole, and there is residual copper on both sides, which is poorly distributed on the entire board. The causes are: after lamination, after exposure, and the development holding time has expired.

6. Incoming copper slag/Pi Feng. The current situation of the slice is that the hole copper is vertically disconnected from the hole, there is no residual copper in the hole, the bad plate order is the board edge step, and there are some multi-layer copper phenomena.

Improvement measures need to be targeted according to the specific reasons. It is recommended to consult professionals or manufacturers for solutions.

Answer 2

Due to factors such as poor solution performance or insufficient swing, the thickness of the tin plating layer is insufficient. During subsequent film removal and alkaline etching, the tin layer and copper layer in the middle of the hole are etched away, resulting in annular cavities. https://wi-fiiot.com/

Answer 3

The impact of holes in the outer layer of the PCB can range from being detected by electrical testing during functional testing to being scrapped, resulting in a waste of factory costs, to serious cases being lost to the customer and resulting in PCBA scrapping. Why did Kong Po skip the O/S test and leak out? Generally speaking, the holes in the PCB process are not really broken to form a complete OPEN state, but are suspected holes that are connected by broken wires. They cannot be effectively detected during the test and are judged as PASS, and are sent to the client as good products. After the customer has attached the parts and undergone two reflow high-temperature shocks (the soldering temperature is about 220°C), the weakest part of the copper in the suspected hole will be completely disconnected, and the disconnected board can be detected by the ICT function test. When the circuit board comes out, the circuit board will show real holes. https://fumaxtech.com/